Interfacing (DSI, CSI, I2C, etc.) • Change PLLD frequency to get a specific DSI frequency

Issue is that I want to make the DSI output (through a sn65dsi83 DSI to LVDS chip) pixel clock to run at ~69 MHz.

The DSI gets its clock from the PLLD running at 3GHz on the RPi4.

With a 2-lane DSI interface and 24-bit output, the divider must be a multiple of 12, so I can only get 62.5 MHz (3000/48) or 83.3 MHz (3000/36) as output. (with 4-lane I could get 72MHz (3000/42), also out of spec)

The panel actually works with these frequencies, but it's way out of spec (which is between 68 and 70 MHz) and the manufacturer won't support it.

So the only way to get to the requested frequency would be to change that 3GHz into something else (around 2.5 GHz to get about 70MHz pixel clock).

Is it possible to change that PLL setting? If so, how?
(I know this will have an effect on other peripherals as well, but I'm willing to deal with that...)

(for techies, I also tried to use an external clock on the sn65dsi83 chip, modifying the driver to support that, but that never got further than displaying a test pattern. The DSI link never worked with that.)

Statistics: Posted by milo246 — Mon Apr 15, 2024 9:02 am

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