Armv8-M architecture has some nice stack limit checking features: for processors based on the Armv8-M Mainline architecture (like Cortex-M23* or M33), each of the stack pointers has a corresponding stack limit register which allows software to define watermark levels for stack overflow detection, and when stack overflow occurs, a Usage fault or HardFault exception is triggered.
* This is part of the optional Security Attribution Unit (SAU). However, it looks like the cheap chips (e.g., the Renesas RA2E2) have a "stack pointer monitor" as part of the Memory Protection Unit (MPU).
* This is part of the optional Security Attribution Unit (SAU). However, it looks like the cheap chips (e.g., the Renesas RA2E2) have a "stack pointer monitor" as part of the Memory Protection Unit (MPU).
Statistics: Posted by carlk3 — Mon Dec 11, 2023 4:17 am