Simple! The delay for the driver kernel are too slow. Adding more sensor and length of wire increase the capacitance then slow down the rising then the 1wire was able to pickup the data because of the delay cause by the capacitance.Why would more sensors and/or longer wires on harness (C) mitigate the RP1 timing issue discussed in this thread?
"brugger" change the timing of the kernel using my bitbanging timing and it is working fine after that!
viewtopic.php?t=364584
Still waiting for an answer .
Statistics: Posted by danjperron — Tue Feb 06, 2024 6:28 pm