You might be right about floating point optimization settings. I've been hoping the system compiler on the vendor supplied distribution would default to reasonable choices, but since most system software does not use floating point that may not be true. It's also possible gcc simply generates good code for ARM NEON these days.Not sure but I think you may need to tell GCC that the RISC cores have the hardware floating-point extensions (F or D).Thanks for posting! I find it interesting how much better RISC-V performs on the integer calculations compared to the floating point. I wonder if that will change and whether the reduced precision floating point types used in deep learning neural networks will also get added.
I think the F3 uses the SpacemiT K1 8 core RISC-V chip, Do you have any suggestions what flags to try?
Statistics: Posted by ejolson — Fri Sep 13, 2024 3:45 am