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General • Re: what is the logic of ADC interrupt enabling?

Code:

static inline void adc_fifo_setup(bool en, bool dreq_en, uint16_t dreq_thresh, bool err_in_fifo, bool byte_shift) {    hw_write_masked(&adc_hw->fcs,                   (bool_to_bit(en) << ADC_FCS_EN_LSB) |                   (bool_to_bit(dreq_en) << ADC_FCS_DREQ_EN_LSB) |                   (((uint)dreq_thresh) << ADC_FCS_THRESH_LSB) |                   (bool_to_bit(err_in_fifo) << ADC_FCS_ERR_LSB) |                   (bool_to_bit(byte_shift) << ADC_FCS_SHIFT_LSB),                   ADC_FCS_EN_BITS |                   ADC_FCS_DREQ_EN_BITS |                   ADC_FCS_THRESH_BITS |                   ADC_FCS_ERR_BITS |                   ADC_FCS_SHIFT_BITS    );}
The only error I can think of is:

Code:

 (((uint)dreq_thresh) << ADC_FCS_THRESH_LSB) 
in the mentioned function.

If uint was only 16 bits, then left shifting it by 24 bits might produce the result 0.
So dreq_thresh should be uint32_t first, or casted, that would be my suggestion.

If this was true (I did not test it), it would be a bug in the library.

So a possible fix could be, change the function so that the line reads:

Code:

(((uint32_t)dreq_thresh) << ADC_FCS_THRESH_LSB) |

Statistics: Posted by terencehill — Fri Sep 06, 2024 10:46 pm



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