This would require more IO banks and a different implementation all together. Microcontrollers generally avoid this on purpose.Add to that support for low voltage differential pairs.More speculations/feature requestsIt would be nice to have dual logic level 3,3 and 1,8 V selected from the software per gpio, if there was some 1,8 V LDO present (or built in).
It would be nice to have dual logic level 3,3 and 1,8 V selected from the software per gpio, if there was some 1,8 V LDO present (or built in).Statistics: Posted by dthacher — Fri May 31, 2024 4:11 am